1. Field of the Invention
The present invention relates generally to microelectromechanical systems (MEMS), more specifically to manufacturing MEMS devices using silicon-on-insulator (SOI) substrates, and most specifically to manufacturing a gimbaled MEMS mirror array from SOI substrates for use in fiber optic switching.
2. Description of Related Art
Among the several technologies competing for acceptance in Optical Cross Connect (OXC) applications, MEMS-based micro-mirrors are regarded as the most promising technology. Typically, the micro-mirrors are arranged as an array (e.g. 8×8 or 16×16) of flat mirrors, each on the order of around 100 microns or more, each mounted on a rotatable section of semiconductor substrate. The array may be configured to selectively reflect optical signals received from a fiber optic channel. When voltage is applied to a particular electrode on the substrate, electrostatic forces cause a slight deflection or rotation of the micro-mirror, redirecting light information to another optical channel. The micro-mirrors may be fabricated as single-axis mirrors rotatable about one axis only, or as dual-axis gimbaled mirrors that are rotatable about two axes (x and y). In general, the dual-axis mirror has greater switching capability than the single-axis mirror, and may assume many more positions in a three-dimensional array (and reflect light to at least twice as many channels) as the single axis mirror.
Known methods of fabricating MEMS mirror arrays have utilized a single SOI wafer to realize dual-axis, double layered micro-mirror structures. Such design approaches require front side etching as well as back side through wafer etching processes on the same SOI wafer. One such fabrication method, known as the parallel plate method, uses etching and/or bonding techniques on an SOI wafer to create an actuator consisting of two planar electrodes displaced from and parallel to a planar mirror. Mirror arrays up to 1000×1000 are possible using the parallel plate method.
One example of a parallel plate device 10 is shown in FIG. 1. A planar mirror 11 is suspended by x-axis 12 and y-axis 13 on a substrate layer 14. Spacers 15 mounted on a substrate 18 displace mirror 11 from planar electrodes 16 and 17 to allow space for rotation of mirror 11. The mirror, axes, spacers, and electrodes are formed on an SOI wafer using deposition and/or etching techniques. FIG. 2 shows a cross section of a conventional SOI wafer 20, which has a front substrate layer 21, a back substrate layer 22, and an insulation layer 23 between the two substrate layers.
There are many competing design factors that limit the effectiveness of the parallel plate design. One problem is that in order to gain switching capability by increasing the displacement angle of the mirror, either higher driving voltages must be applied to the electrodes, or the axis material (which acts as a spring) must be made extremely soft. Neither of these options is particularly desirable. Higher driving voltages raise power consumption, and softer springs render the device more susceptible to material failures. In general, a design tradeoff occurs whereby faster switching time is achieved by raising the driving voltage, and lower driving voltage is achieved at the expense of switching time. In the parallel plate design space, a driving voltage of 100 volts corresponds to a switching time of about 10 ms. A performance specification for a 1 ms switching time at a driving voltage of less than 100 volts is not achievable using a parallel plate solution.
An alternative design that uses comb-driven actuators can achieve superior performance characteristics. A comb driven, dual axis micro-mirror architecture is especially attractive for large scale optical switching systems due to its advantages of low optical insertion loss, large inter-channel isolation, fast switching speed, and low driving voltage. At the current state of the art, 3-D MEMS mirror arrays using comb-driven actuators for optical switching could achieve 1 ms switching times (1000 Hz) at well below 100 volts.
Such devices, however, are very difficult to fabricate. Comb-drive actuators have been fabricated using through-wafer processing techniques on both sides of an SOI wafer. Generally, through-wafer processing is an expensive fabrication technique that is associated with lower yield. In addition, through-wafer processing places structural limitations on comb and gap design that directly affect device performance. For example, the achievable comb finger density is not sufficient to produce a desirable fill factor or resonant frequency. Other factors also drive up production costs. For example, conductive wires must be bonded separately to the wafer to make the needed electrical connections. Low reliability due to stress-related failure is also a concern. Through-wafer processing does not allow for the fabrication of a stress compensation layer beneath a MEMS structure that is formed on an outer layer of the SOI wafer.
Effectively utilizing a double-sided deep silicon etching process, electrical interconnection techniques, and wafer level packaging are the major challenges for realizing sophisticated devices such as 3D MEMS mirror arrays. Market forces demand further development of a high performance, stress compensated dual-axis, low-power MEMS mirror array that may be realized through an inexpensive, high-yield, wafer-level manufacturing process.